Students must design a digital circuit that displays the count from 00 to 80 with two control inputs (Next and Reset) and two output displays. The Next signal comes from a push-button switch that, when pressed, advances the display by one. The Reset signal, also a push-button switch, will reset the display to a count of 00. When the display reaches 80, the count will be paused and held. (The employee at the deli counter takes a break, and a new employee takes over the counter after the 80th customer is served.)
Include the Next switch and the Reset Switch.
A design feature that holds the count when it reaches 80 must be included.
Any additional logic may be used as needed to support the counter designs.
The tens-unit display (Most Significant Digit) is controlled by an asynchronous counter designed with a 74LS93N MSI counter IC. The PLD mode equivalent of the 74LS93N is the CNTR_4BIN_AS (Counter_4-Bit_Binary_Asynchronous).
The ones-unit display (Least Significant Digit) is controlled by an asynchronous counter designed with SSI logic gates (D Flip-Flops).
The two output displays are common cathode seven-segment displays only.
The two displays require a multiplexed design. (PLD only)
The video shows the sketch of the circuit and the circuit in Multisim. The circuit counts up to 80 for each time the user would press a button The counter caps at 80 before needing to be reset. The reset can also be used at any point.
Making the actual counter was easy as it was a simple flip-flop counter. However, stopping it at 80 was the hardest part of the project as it involved sending the output single to the inputs and, thus, making the counter stop at 80.